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 Preliminary
RT9205/A
Dual Regulators - Synchronous Buck PWM DC-DC and Linear Controller
General Description
The RT9205/A is a dual-output power controllers designed for high performance graphics cards and personal computers. The IC integrates a synchronous buck controller, a linear controller and protection functions into a small 14-pin package. The RT9205/A uses an internal compensated voltage mode PWM control for simplying design. An internal 0.8V reference allows the output voltage to be precisely regulated to meet low output voltage requirement. A fixed 300kHz oscillation frequency reduces the component size for saving board area. The RT9205/A also features over voltage protection (OVP) and under voltage lock-out (UVLO).
Features
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Operates at 5V 0.8V Internal Reference Drives Two N-MOSFET Voltage Mode PWM Control Fast Transient Response Fixed 300kHz Oscillator Frequency Dynamic 0 to 100% Duty Cycle Internal PWM Loop Compensation Internal Soft-Start Adaptive Non-Overlapping Gate Driver Over-Voltage Protection Uses Lower MOSFET RoHS Compliant and 100% Lead (Pb)-Free
Applications
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Ordering Information
RT9205/A Package Type S : SOP-14 Operating Temperature Range P : Pb Free with Commercial Standard G : Green (Halogen Free with Commercial Standard) UVP : Hiccup Node UVP : Latch Mode Note : RichTek Pb-free and Green products are : }RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020. }Suitable for use in SnPb or Pb-free soldering processes. }100%matte tin (Sn) plating.
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PC Motherboard Cable Modems, Set-Top-Box, and XDSL Modems DSP and Core Communications Processor Supplies Memory Power Supplies Personal Computer Peripherals Industrial Power Supplies 5V Input DC-DC Regulators Low Voltage Distributed Power Supplies Graphic Cards
Pin Configurations
(TOP VIEW)
LGATE PGND GND VCC DRV FBL NC 14 13 12 11 10 9 8 UGATE BOOT NC NC NC FB NC
2 3 4 5 6 7
SOP-14
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RT9205/A
Typical Application Circuit
5V 1uH 1uF 1N5819 4 5 DRV UGATE 0.8V 6 FBL 9 1uF FB RT9205/A PGND GND 2 200 200 10nF 120 R2<1K 3 VOUT1 = 0.8V*(1+R3/R4) LGATE 1 D2 5 Phase 14 D1 7 D2 6 2 G1 3 S2 4 G2 1uF VCC BOOT + 13 1 680uF 5uH + 0.1uF PHKD6N02LT 8 S1 D1 Phas e Be Careful during Layout
5V
5V
+
100uF
2SD1802
VOUT1 1.6V
VOUT2
+
Preliminary
3.4V VOUT2 = 0.8V*(1+R1/R2)
390
680uF LESR
680uF LESR
+
10nF
Figure 1. RT9205/A powered form 5V
1uF
470uF
Pull FB trace out after COUT
DS9205/A-08 March 2007
DS9205/A-08 March 2007
5V 12V 5V 0 1uH 1uF Be Careful during Layout 0.1uF 10 4 VCC 13 BOOT V OUT1 1.7V 1000uF 5uH
3.3V
+ + +
5 DRV 1uF 1000uF
Phase
100uF
2SD5706
UGATE
14
PHB66NQ03LT
Suggest use Transistor
+
+
+
V OUT2 0.8V 6 FBL FB RT9205/A PGND 200 R2<1K 200 200 10nF GND 3 V OUT1 = 0.8V*(1+R3/R4) 9 LGATE 1 PHB108NQ03LT
Preliminary
1uF
2.5V V OUT2 = 0.8V*(1+R1/R2)
430
1nF LESR
1nF LESR
1nF LESR
+
10nF
Figure 2. RT9205/A powered from 12V
1uF
470uF
Pull FB trace out after C OUT
RT9205/A
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RT9205/A
+
Preliminary
MU COUT 1000uF GND CVCC 1uF VCC BOOT 0.1uF RT9205/A G S GND Return D L 5uH G S
+
CBOOT
CIN1 1uF
C IN2 470uF
ML D
Layout Placement Layout Notes 1. Put C1 & C2 to be near the MU drain and ML source nodes. 2. Put RT9205/A to be near the COUT 3. Put CBOOT as close as to BOOT pin 4. Put CVCC as close as to VCC pin
Function Block Diagram
6.0V Regulation VCC + Power on Reset
VCC
BOOT
LDO
FBL 0.8 Reference + 1V +
OVP UVP
0.8V FB
+ SS Error Amplifier
GND
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+
DRV
Soft Start
UGATE
UVP 0.5V + + +PWM -
Control Logic VCC LGATE
300kHz Oscillator
DS9205/A-08 March 2007
Preliminary Functional Pin Description
LGATE (Pin 1) Connect the LGATE pin to the gate of lower MOSFET. This pin provides the gate drive for the lower MOSFET. PGND/GND (Pin 2, 3) Signal and power ground for the IC. All voltage levels are measured with respect to this pin. VCC (Pin 4) This is the main bias supply for the RT9205/A. This pin also provides the gate bias charge for the gate of lower MOSFET. The voltage at this pin is monitored for ensuring a proper power-on reset (POR). This pin is also the out of an internal 6.0V regulator that powered from the BOOT pin when the BOOT pin is directly powered from ATX 12V. DRV (Pin 5) This pin is the output of a linear controller. It should be connected to the base of an external bypass NPN transistor or the gate of a N-MOSFET to form a linear low dropout regulator. FBL (Pin 6) This pin is connected to the output resistor-divider of an external power transistor or a N-MOSFET based low dropout regulator for regulating and monitoring the output voltage. This pin is also connected to the protection monitor and the invertering input of error amplifier of internal linear regulator inside the IC. FB (Pin 9) This pin is connected to the PWM converter's output-divider for regulating and monitoring the output voltage of buck converter. This pin also connects to the protection monitor and the inverting input of internal PWM error amplifier inside the IC. BOOT (Pin 13)
RT9205/A
This pin provides ground referenced bias voltage to the upper MOSFET driver. A bootstrap circuit is used to create a voltage that is suitable for driving a logic-level N-MOSFET when operating at a single 5V power supply. This pin also could be powered from ATX 12V, in this situation, an internal 6.0V regulator will supply to VCC pin for generating bias required inside the IC. UGATE (Pin 14) Connect the UGATE pin to the gate of upper MOSFET. This pin provides the gate drive for the upper MOSFET. NC (Pin 7,8,10,11,12) No Connection.
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RT9205/A
Absolute Maximum Ratings
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Preliminary
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Supply Voltage VCC ------------------------------------------------------------------------------------------------ 7V BOOT & UGATE to GND ------------------------------------------------------------------------------------------- 19V Input, Output or I/O Voltage --------------------------------------------------------------------------------------- GND-0.3V to 7V Package Thermal Resistance SOP-14, JA ----------------------------------------------------------------------------------------------------------------------------------------------------- 160 C/W Ambient Temperature Range -------------------------------------------------------------------------------------- 0 C to +70C Junction Temperature Range -------------------------------------------------------------------------------------- -40C to +125C Storage Temperature Range --------------------------------------------------------------------------------------- -65C to +150C Lead Temperature (Soldering, 10 sec.) -------------------------------------------------------------------------- 260C
CAUTION: Stresses beyond the ratings specified in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Electrical Characteristics
(VCC = 5V, TA = 25 C, Unless otherwise specified.)
Parameter VCC Supply Current Nominal Supply Current VCC Regulated Voltage Power-On Reset Rising VCC Threshold VCC Threshold Hysteresis Reference Reference Voltage Oscillator Free Running Frequency Ramp Amplitude PWM Error Amplifier DC gain PWM Controller Gate Driver Upper Drive Source Upper Drive Sink Lower Drive Source Lower Drive Sink Linear Regulator DRV Driver Source Protection FB Over-Voltage Trip FB & FBL Under-Voltage Trip Soft-Start Interval
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Symbol ICC V CC
Test Conditions UGATE, LGATE open VBOOT = 12V
Min -5 3.8 --
Typ 3 6 4.1 0.5 0.8
Max -7 4.4 -0.816
Units mA V V V V
VFB
Both PWM and linear regulator
0.784
250 VOSC -32 BOOT= 12V BOOT-VUGATE = 1V VUGATE = 1V VCC - VLGATE = 1V, VLGATE = 1V VDRV = 2V FB Rising FB & FBL Falling
300 1.75 35
350 -38
kHz VP-P dB
RUGATE RUGATE RLGATE RLGATE
----100 0.9 ---
7.5 5 3.5 2 -1 0.5 2.5
11 8 6 5 --0.65 --
mA V V ms
DS9205/A-08 March 2007
Preliminary Typical Operating Characteristics
Dead Time
VCC = 5V UGATE VCC = 5V
RT9205/A
Dead Time
UGATE
LGATE
LGATE
Time (50ns/Div)
Time (50ns/Div)
Power On
VCC = 5V VOUT1 = 2.5V VOUT2 = 1.8V VCC VCC
Power Off
VCC = 5V VOUT1 = 2.5V VOUT2 = 1.8V
VOUT1
VOUT1
VOUT2
VOUT2
Time (2.5ms/Div)
Time (50ms/Div)
Load Transient
UGATE
Load Transient
UGATE VOUT VCC = 5V VOUT = 2.2V COUT = 3000uF VCC = 5V VOUT = 2.2V COUT = 3000uF VOUT
Time (5us/Div)
Time (5us/Div)
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RT9205/A
Short Hiccup (Latch Mode)
VCC = 5V VOUT = 2.2V
Preliminary
Short Hiccup
VCC = 5V VOUT = 2.2V
VOUT VOUT UGATE
UGATE RT9205 RT9205A
Time (2ms/Div)
Time (2ms/Div)
Bootstrap Wava Form
VCC = 5V, VOUT = 2.2V
0.803 0.802
Reference vs. Temperature
Reference (V)
UGATE
0.801 0.800 0.799 0.798 0.797 0.796
LGATE
PHASE
Time (1us/Div)
-50
0
50
100
150
Temperature (C)
IOCSET vs. Temperature
55 50 45 4.3 4.2 4.1
POR (Rising/Falling) vs. Temperature
Rising
I OCSET (uA)
40 35 30 25 20 -40 -10 20 50 80 110 140
POR (V)
4.0 3.9 3.8 3.7 3.6 -50 0 50 100 150
Falling
Temperature (C)
Temperature(C)
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DS9205/A-08 March 2007
Preliminary
RT9205/A
Oscillator Frequency vs. Temperature
315 310
Frequency (kHz) A
305 300 295 290 285 280 275 270 -50 0 50 100 150
Temperature (C)
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RT9205/A
Application Information
Preliminary
The RT9205/A operates at either single 5V power supply with a bootstrap UGATE driver or a 5V/12V dual-power supply form the ATX SMPS. The dual- power supply is recommended for high current applications, the RT9205/ A can deliver higher gate driving current while operating with ATX SMPS based on a dual-power supply. The Bootstrap Operation In a single power supply system, the UGATE driver of RT9205/A is powered by an external bootstrap circuit, as shown in the Figure 3. The boot capacitor, CBOOT , generates a floating reference at the PHASE pin. Typically a 0.1F CBOOT is enough for most of MOSFETs used with the RT9205/A. The voltage drop between BOOT and PHASE is refreshed to a voltage of VCC - diode drop (VD) while the lower MOSFET turning on.
R1 VCC C2 1uF D1 5V 0.1uF
+
VCC
6.0V Regulation
BOOT C 1uF UGATE
R 10
12V 5V
+
VCC C2 1uF LGATE
RT9205/A
Figure 4. Dual Power Supply Operation
Power On Reset The Power-On Reset (POR) monitors the supply voltage (normal +5V) at the VCC pin and the input voltage at the OCSET pin. The VCC POR level is set to 4.1V with 0.5V hysteresis and the normal level at OCSET pin is set to 1.5V (see over-current protection). The POR function initiates soft-start operation after all supply voltages exceed their POR thresholds. Soft Start
BOOT
UGATE PHASE VCC LGATE
RT9205/A
Figure 3. Single 5V power Supply Operation
A built-in soft-start is used to prevent surge current from power supply input during powering on. The soft-start voltage is controlled by an internal digital counter. It slows down and clamps the ramping of reference voltage at the input of error amplifier and the pulse-width of the output driver. The typical soft-start duration is 2.5ms. Under Voltage and Over Voltage Protection
Dual Power Operation The RT9205/A was designed to supply a regulated 6.0V at VCC pin automatically when BOOT pin is powered by a 12V. In a system with ATX 5V/12V power supply, the RT9205/A is ideal for higher current applications due to the higher gate driving capability, VUGATE = 12V and VLGATE = 6.0V. A RC (10/1F) filter is also recommended at BOOT pin to prevent the ringing induced from fast power-on, as shown in Figure 4.
The voltage presents at FB pin is monitored and protected against OC (over current), UV (under voltage), and OV (ov er v oltage). The UV threshold is 0.56V and OV-threshold is 1.0V. Both UV and OV detection are with 30s delay after triggered. When OC or UV trigged, a hiccup re-start sequence will be initialized, as shown in Figure 5. For RT9205, only 3 times of trigger are allowed before latching off. But for RT9205A, UVP will be kept in hiccup mode. Hiccup is disabled during soft-start interval.
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DS9205/A-08 March 2007
Preliminary
Q COUNT = 1
Internal
RT9205/A
L
COUNT = 2
COUNT = 3 VI D C R VO
4V
SS
2V 0V OVERLOAD
INDUCTOR CURRENT
APPLIED
C.C.M. TS
0A T0 T1 T2 TIME T3 VL
TON
TOFF VI - VO
Figure 5
- VO
Inductor Selection The RT9205/A was designed for VIN = 5V, step-down application mainly. Figure 6 shows the typical topology and waveforms of step-down converter. The ripple current of inductor can be calculated as follows:
ILRIPPLE = (5V - VOUT) L x TON
iL
uQ uIL
IL = IO
iQ IQ
Because operation frequency is fixed at 300kHz,
TON = 3.33 x VOUT 5V
ID iD
The VOUT ripple is
VOUT
RIPPLE = ILRIPPLE x ESR
ESR is the equivalent series resistor of output capacitor Table 1 shows the ripple voltage of VOUT at VIN = 5V Table 1 VOUT Inductor 1000F (ESR=53m) 1500F (ESR=33m) 2H 100mV 62mV 3.3V 5H 40mV 25mV 2H 110mV 68mV 2.5V 5H 44mV 28mV 18mV 2H 93mV 58mV 37mV 1.5V
Figure 6
5H 37mV 23mV 15mV
3000F (ESR=21m) 40mV 16mV 43mV *Refer to Sanyo low ESR series (CE, DX, PX.....) The suggested L and C are as follows: 2H with 1500F COUT 5H with 1000F COUT
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RT9205/A
Input / Output Capacitor
Preliminary
Suggest Low VT MOSFET VOUT2 < 3.3V
+
High frequency/long life decoupling capacitors should be placed as close to the power pins of the load as physically possible. Be careful not to add inductance to the PCB trace, as it could eliminate the performance from utilizing these low inductance components. Consult with the manuf acturer of the load on specific decoupling requirements. The output capacitors are necessary for filtering output and stabilizing the close loop (see the PWM loop stability). For powering advanced high-speed processors, it is required to meet fast load transient requirement. Also high ESR usually induces ripple that may trigger UV or OV protections. So High frequency capacitors with low ESR/ ESL capacitors are recommended here. Linear Regulator Driver The linear controller of RT9205/A was designed to drive an external bipolar NPN transistor or a N-MOSFET. For a NChannel MOSFET, normally DRV need to provide minimum VOUT2+VT+gate-drive voltage to keep VOUT2 as the set voltage. When driving MOSFET operating at a 5V power supply, the gate-drive will be limited at 5V. At this situation, as shown in Figure 7 a MOSFET with low VT threshold (VT = 1V) and set Vout2 below 2.5V are suggested. In VBOOT = 12V operation condition, as Figure 8 shown, VCC is regulated higher than 6V, which providing higher gatedrive capability for driving the MOSFET, VOUT2 can be set as VOUT2 3.3V.
Suggest Low VT MOSFET VOUT2 < 2.5V
+
Max. 6V
DRV VBOOT = 12V R3 BOOT FBL R4 VCC RT9205/A
6V
R4<1K
Figure 8 PWM Loop Stability The RT9205/A is a voltage mode buck controller designed for 5V step-down applications. The gain of error amplifier is fixed at 35dB for simplifying design. The output amplitude of ramp oscillator is 1.6V, the loop gain and loop pole/zero are calculated as follows : DC loop gain GA = 35 dB x LC filter pole PO = 1 2 LC 1 2 ESR x C 5 x 0.8
1.75 VOUT
Error Amp pole PA = 300kHz ESR zero ZO =
The RT9205/A Bode plot is as shown in Figure 9. It is stable in most of application conditions.
Max. 5V
VOUT = 3.3V COUT = 1500uF(33m) L = 2uH VOUT = 1.5V PO = 2.9kHz VOUT = 2.5V ZO = 3.2kHz VOUT = 3.3V
DRV R3 BOOT FBL R4 VCC VCC = 5V RT9205/A
40 R4<1K 30 20
Loop Gain 10
Figure 7
100
1k
10k
100k
1M
Figure 9
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Preliminary
Reference Voltage Because RT9205/A uses a low 35dB gain error amplifier, as shown in Figure 10. The voltage regulation is dependent on VIN and VOUT settings. The FB reference voltage of 0.8V were trimmed at VIN = 5V and VOUT = 2.5V. In a fixed VIN = 5V application, the FB reference voltage vs. VOUT voltage can be calculated as Figure 11.
VIN
RT9205/A
L VOUT
+
COUT R1 R1 R2 R2 <1K C1 RT9205/A FB
I3 FB + I2 1K REP 0.8V 56K EA + RAMP 1.75V + PWM
VOUT = VFB x (1 +
)
Figure 12
PWM Layout Considerations MOSFETs switch very fast in efficiency. The speed with which the current transitions from one device to another causes voltage spikes across the interconnecting impedances and parasitic circuit elements. The voltage spikes can degrade efficiency and radiate noise, that results in over-voltage stress on devices. Careful the layout for component placement layout and printed circuit design can minimize the voltage spikes induced in the converter. Consider, as an example, the turn-off transition of the upper MOSFET prior to turn-off, the upper MOSFET was carrying the full load current. During turn-off, current stops flowing in the upper MOSFET and is picked up by the lower MOSFET or Schottky diode. Any inductance in the switched current path generates a large voltage spike during the switching interval. Care with component selections, layout of the critical components, and use shorter and wider PCB traces that help in minimizing the magnitude of voltage spikes. There are two sets of critical components in a DC-DC converter using the RT9205/A. The switching power components are most critical because they switch large amounts of energy, and as such, they tend to generate equally large amounts of noise. The critical small signal components are those connected to sensitive nodes or those supplying critical bypass current.
Figure 10
0.82 VIN = 5V 0.81
FB (V)
0.80 0.79 VFB = 0.8 - ( 0.78 10 20 Duty - 50 100 30 40 50 60 Duty (%) 70 80 90
) x 6.25mV
Figure 11
Feedback Divider The reference of RT9205/A is 0.8V. The output voltage can be set using a resistor-divider as shown in Figure 12. Put the R1 and R2 as close as possible to FB pin. R2 value should be less than 1 k to avoid noise coupling issue. The C1 capacitor is a speed-up capacitor for reducing output ripple to meet with the requirement of fast transient load. Typically, value between 1nF and 0.1F is enough for C1.
DS9205/A-08 March 2007
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RT9205/A
Preliminary
The power components and the PWM controller should be placed firstly. Place the input capacitors, especially the high-frequency ceramic decoupling capacitors, close to the power switches. Place the output inductor and output capacitors between the MOSFETs and the load. Also locate the PWM controller near by MOSFETs. A multi-layer printed circuit board is recommended. Figure 13 shows the connections of the critical components in the converter. Note that the capacitors CIN and COUT represent numerous physical capacitors. Use a dedicated grounding plane and use vias to ground all critical components to this layer. Apply another solid layer as a power plane and cut this plane into smaller islands of common voltage levels. The power plane should support the input power and output power nodes. Use copper filled polygons on the top and bottom circuit layers for the PHASE node, but it is not necessary to oversize this particular island. Since the PHASE node is subjected to very high dV/dt voltages, the stray capacitance formed between these islands and the surrounding circuitry will tend to couple switching noise. Use the remaining printed circuit layers for small signal routing. The PCB traces between the PWM controller and the gate of MOSFET and also the traces connecting source of MOSFETs should be sized to carry 2A peak currents.
IQ1 5V Q1 IQ2 Q2 GND
+ +
IL VOUT
+
LOAD
GND LGATE VCC RT9205/A UGATE FB
Figure 13
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DS9205/A-08 March 2007
Preliminary Outline Dimension
A H M
RT9205/A
J
B
F
C I D
Symbol A B C D F H I J M
Dimensions In Millimeters Min 8.534 3.810 1.346 0.330 1.194 0.178 0.102 5.791 0.406 Max 8.738 3.988 1.753 0.508 1.346 0.254 0.254 6.198 1.270
Dimensions In Inches Min 0.336 0.150 0.053 0.013 0.047 0.007 0.004 0.228 0.016 Max 0.344 0.157 0.069 0.020 0.053 0.010 0.010 0.244 0.050
14-Lead SOP Plastic Package
Richtek Technology Corporation
Headquarter 5F, No. 20, Taiyuen Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Fax: (8863)5526611
Richtek Technology Corporation
Taipei Office (Marketing) 8F, No. 137, Lane 235, Paochiao Road, Hsintien City Taipei County, Taiwan, R.O.C. Tel: (8862)89191466 Fax: (8862)89191465 Email: marketing@richtek.com
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